ABRT_GCALL_READ=Val_0x0, ABRT_10ADDR1_NOACK=Val_0x0, ABRT_GCALL_NOACK=Val_0x0, ABRT_TXDATA_NOACK=Val_0x0, ABRT_10ADDR2_NOACK=Val_0x0, ABRT_7B_ADDR_NOACK=Val_0x0, ABRT_DEVICE_NOACK=Val_0x0, ABRT_USER_ABRT=Val_0x0, ABRT_SLVFLUSH_TXFIFO=Val_0x0, ABRT_10B_RD_NORSTRT=Val_0x0, ABRT_SBYTE_ACKDET=Val_0x0, ABRT_SBYTE_NORSTRT=Val_0x0, ABRT_SLVRD_INTX=Val_0x0, ABRT_SDA_STUCK_AT_LOW=Val_0x0, ARB_LOST=Val_0x0, ABRT_DEVICE_WRITE=Val_0x0, ABRT_DEVICE_SLVADDR_NOACK=Val_0x0, ABRT_SLV_ARBLOST=Val_0x0, ABRT_MASTER_DIS=Val_0x0
Transmit Abort Source Register
| ABRT_7B_ADDR_NOACK | This field indicates that the master is in 7-bit addressing mode and the address sent was not acknowledged by any slave. Role of I2C: Master-Transmitter or Master-Receiver 0 (Val_0x0): This abort is not generated 1 (Val_0x1): This abort is generated because of NOACK for 7-bit address |
| ABRT_10ADDR1_NOACK | This field indicates that the master is in 10-bit address mode and the first 10-bit address byte was not acknowledged by any slave. Role of I2C: Master-Transmitter or Master-Receiver 0 (Val_0x0): This abort is not generated 1 (Val_0x1): Byte 1 of 10-bit address not acknowledged by any slave |
| ABRT_10ADDR2_NOACK | This field indicates that the master is in 10-bit address mode and that the second address byte of the 10-bit address was not acknowledged by any slave. Role of I2C: Master-Transmitter or Master-Receiver 0 (Val_0x0): This abort is not generated 1 (Val_0x1): Byte 2 of 10-bit address not acknowledged by any slave |
| ABRT_TXDATA_NOACK | This field indicates the master-mode-only bit. When the master receives an acknowledgement for the address, but when it sends data byte(s) following the address, it did not receive an acknowledge from the remote slave(s). Role of I2C: Master-Transmitter 0 (Val_0x0): Transmitted data not acknowledged by addressed slave-scenario not present 1 (Val_0x1): Transmitted data not acknowledged by addressed slave |
| ABRT_GCALL_NOACK | This field indicates that I2C in Master mode has sent a General Call and no slave on the bus acknowledged the General Call. Role of I2C: Master-Transmitter 0 (Val_0x0): GCALL not acknowledged by any slave-scenario not present 1 (Val_0x1): GCALL not acknowledged by any slave |
| ABRT_GCALL_READ | This field indicates that I2C in the Master mode has sent a General Call but following programmed byte the General Call to be a read from the bus (I2C_DATA_CMD[CMD] is set to 0x1). Role of I2C: Master-Transmitter 0 (Val_0x0): GCALL is followed by read from bus-scenario not present 1 (Val_0x1): GCALL is followed by read from bus |
| ABRT_SBYTE_ACKDET | This field indicates that the master has sent a START byte and the START byte was acknowledged (wrong behavior). Role of I2C: Master 0 (Val_0x0): ACK detected for START byte- scenario not present 1 (Val_0x1): ACK detected for START byte |
| ABRT_SBYTE_NORSTRT | To clear the ABRT_SBYTE_NORSTRT must be fixed first;
0 (Val_0x0): Send START byte when RESTART disabled- scenario not present 1 (Val_0x1): Send START byte when RESTART disabled |
| ABRT_10B_RD_NORSTRT | This field indicates that the restart is disabled (I2C_CON[IC_RESTART_EN] bit set to 0x0) and the master sends a read command in 10-bit addressing mode. Role of I2C: Master-Receiver 0 (Val_0x0): Master not read in 10-bit addressing mode when RESTART disabled 1 (Val_0x1): Master read in 10-bit addressing mode when RESTART disabled |
| ABRT_MASTER_DIS | This field indicates the master operation with the Master mode disabled. Role of I2C: Master-Transmitter or Master-Receiver 0 (Val_0x0): Initiate master operation when Master disabled- scenario not present 1 (Val_0x1): Intitate master operation when Master disabled |
| ARB_LOST | This field specifies that the master has lost arbitration, or if I2C_TX_ABRT_SOURCE[ABRT_SLV_ARBLOST] is also set, then the slave transmitter has lost arbitration. Role of I2C: Master-Transmitter or Slave-Transmitter 0 (Val_0x0): Master or Slave-Transmitter lost arbitration- scenario not present 1 (Val_0x1): Master or Slave-Transmitter lost arbitration |
| ABRT_SLVFLUSH_TXFIFO | This field specifies that the slave has received a read command and some data exists in the Tx FIFO, so the slave issues a TX_ABRT interrupt to flush old data in Tx FIFO. Role of I2C: Slave-Transmitter 0 (Val_0x0): Slave flushes existing data in Tx FIFO upon getting read command- scenario not present 1 (Val_0x1): Slave flushes existing data in Tx FIFO upon getting read command |
| ABRT_SLV_ARBLOST | This field indicates that a slave has lost the bus while transmitting data to a remote master. The I2C_TX_ABRT_SOURCE[ARB_LOST] is set at the same time. Even though the slave never owns the bus, something could go wrong on the bus. This is a fail safe check. For instance, during a data transmission at the low-to-high transition of SCL, if what is on the data bus is not what is supposed to be transmitted, then I2C no longer own the bus. Role of I2C: Slave-Transmitter 0 (Val_0x0): Slave lost arbitration to remote master- scenario not present 1 (Val_0x1): Slave lost arbitration to remote master |
| ABRT_SLVRD_INTX | When the processor side responds to a Slave mode request for data to be transmitted to a remote master and I2C_DATA_CMD[CMD] bit is set to 0x1. Role of I2C: Slave-Transmitter 0 (Val_0x0): Slave trying to transmit to remote master in read mode- scenario not present 1 (Val_0x1): Slave trying to transmit to remote master in read mode |
| ABRT_USER_ABRT | This is a master-mode-only bit. Master has detected the transfer abort (I2C_ENABLE[ABORT] bit). Role of I2C: Master-Transmitter 0 (Val_0x0): Transfer abort detected by master-scenario not present 1 (Val_0x1): Transfer abort detected by master |
| ABRT_SDA_STUCK_AT_LOW | This is a master-mode-only bit. Master detects the SDA stuck at low for the IC_CLK. Role of I2C: Master 0 (Val_0x0): This abort is not generated 1 (Val_0x1): This abort is generated because of SDA stuck at low for the IC_CLK |
| ABRT_DEVICE_NOACK | This is a master-mode-only bit. Master is initiating the DEVICE_ID transfer and the device id sent was not acknowledged by any slave. Role of I2C: Master 0 (Val_0x0): This abort is not generated 1 (Val_0x1): This abort is generated because of NOACK for DEVICE-ID |
| ABRT_DEVICE_SLVADDR_NOACK | This is a master-mode-only bit. Master is initiating the DEVICE_ID transfer and the slave address sent was not acknowledged by any slave. Role of I2C: Master 0 (Val_0x0): This abort is not generated 1 (Val_0x1): This abort is generated because of NOACK for slave address |
| ABRT_DEVICE_WRITE | This is a master-mode-only bit. Master is initiating the DEVICE_ID transfer and the Tx FIFO consists of write commands. Role of I2C: Master 0 (Val_0x0): This abort is not generated 1 (Val_0x1): This abort is generated because of NOACK for slave address |
| TX_FLUSH_CNT | This field indicates the number of Tx FIFO data commands which are flushed due to TX_ABRT interrupt. It is cleared whenever I2C is disabled. Role of I2C: Master-Transmitter or Slave-Transmitter |